Application
11935030 · METHOD FOR CAPTURING AND USING DESIGN INTENT IN AN INTEGRATED CIRCUIT FABRICATION PROCESS
Filed 2007-11-05 · Abandoned The official file ↗ · Art unit 3624 · Examiner Beverly A Tate · CPC G06F 30/398 · APPLIED MATERIALS, INC. · PATTERSON & SHERIDAN, LLP Appm/NJ
Office actions
1
first was Non-final rejection
RCEs
0
no appeal
To first action
16.0 mo
to disposition 22.6 mo
Statutes raised
101 103
1 actions read