Application

13240769 · METHOD FOR FORMING INTEGRATED CIRCUITS ON A STRAINED SEMICONDUCTOR SUBSTRATE

Filed 2011-09-22 · Granted · Patent 8906776 (2014-12-09) The official file ↗The patent and its PDF ↗ · Art unit 2822 · Examiner Jamie C Niesz Hard · CPC H10D 30/798 · STMICROELECTRONICS (CROLLES 2) SAS · Seed IP Law Group LLP/STMicroelectronics

Office actions

first was Restriction requirement

RCEs

no appeal

To first action

16.4 mo

to disposition 38.6 mo

Statutes raised

102 103 112

3 actions read

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