Application

13324405 · THROUGH SILICON VIA (TSV) ISOLATION STRUCTURES FOR NOISE REDUCTION IN 3D INTEGRATED CIRCUIT

Filed 2011-12-13 · Granted · Patent 8546953 (2013-10-01) The official file ↗The patent and its PDF ↗ · Art unit 2898 · Examiner Cory W Eskridge Typical · CPC H10W 20/20 · MAGO BARCA IP LLC · DUANE MORRIS LLP (TSMC)

Office actions

first was Non-final rejection

RCEs

no appeal

To first action

12.6 mo

to disposition 21.6 mo

Statutes raised

102 103

1 actions read

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