PATLY.AIApplication
13932288 · METHODS OF ADDING PADS AND ONE OR MORE INTERCONNECT LAYERS TO THE PASSIVATED TOPSIDE OF A WAFER INCLUDING CONNECTIONS TO AT LEAST A PORTION OF THE INTEGRATED CIRCUIT PADS THEREON
Filed 2013-07-01 · Granted · Patent 8697456 (2014-04-15) The official file ↗The patent and its PDF ↗ · Art unit 2892 · Examiner Ajay Arora Typical · CPC H10P 74/207 · ADVANCED INQUIRY SYSTEMS, INC. · MR. DOMINIK SCHMIDT
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