Application

14132739 · ROUTING LAYER FOR MITIGATING STRESS IN A SEMICONDUCTOR DIE

Filed 2013-12-18 · Granted · Patent 9059159 (2015-06-16) The official file ↗The patent and its PDF ↗ · Art unit 2896 · Examiner Sheila V Clark Easy · CPC H10W 90/701 · ATI TECHNOLOGIES ULC · ADVANCED MICRO DEVICES, INC.

Office actions

first was Non-final rejection

RCEs

no appeal

To first action

3.2 mo

to disposition 17.9 mo

Statutes raised

2 actions read

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