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14188732 · ROUTING LAYER FOR MITIGATING STRESS IN A SEMICONDUCTOR DIE

Filed 2014-02-25 · Granted · Patent 9035471 (2015-05-19) The official file ↗The patent and its PDF ↗ · Art unit 2896 · Examiner Sheila V Clark Easy · CPC H10W 72/90 · ATI Technologies ULC · ADVANCED MICRO DEVICES, INC.

Office actions
1
first was Non-final rejection
RCEs
0
no appeal
To first action
3.2 mo
to disposition 14.7 mo
Statutes raised
101 DP
1 actions read
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