Application

14577656 · METHOD FOR FABRICATING A TRANSISTOR WITH A RAISED SOURCE-DRAIN STRUCTURE

Filed 2014-12-19 · Abandoned The official file ↗ · Art unit 2896 · Examiner Jesse Y Miyoshi Hard · CPC H10D 64/259 · STMicroelectronics (Crolles 2) SAS · CROWE & DUNLEVY - ST

Office actions

first was Restriction requirement

RCEs

no appeal

To first action

14.2 mo

to disposition 28.7 mo

Statutes raised

102 103 112

2 actions read

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