PATLY.AIApplication
14583178 · 2D/3D NAND MEMORY ARRAY WITH BIT-LINE HIERARCHICAL STRUCTURE FOR MULTI-PAGE CONCURRENT SLC/MLC PROGRAM AND PROGRAM-VERIFY
Filed 2014-12-25 · Granted · Patent 9613704 (2017-04-04) The official file ↗The patent and its PDF ↗ · Art unit 2825 · Examiner David Lam Easy · CPC G11C 16/14 · Aplus Flash Technology, Inc. · Fang Wu
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first was Ex parte Quayle
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To first action
19.8 mo
to disposition 27.3 mo
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