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15073583 · EARLY GLOBAL SET/RESET SIGNAL DETERMINATION FOR PROGRAMMABLE LOGIC DEVICES

Filed 2016-03-17 · Granted · Patent 9680475 (2017-06-13) The official file ↗The patent and its PDF ↗ · Art unit 2844 · Examiner Daniel D Chang Easy · CPC H03K 19/1774 · Lattice Semiconductor Corporation · Lattice Semiconductor Corp

Office actions
1
first was Non-final rejection
RCEs
0
no appeal
To first action
8.2 mo
to disposition 14.9 mo
Statutes raised
102
1 actions read
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