Application

15087797 · HANDLING OF ERROR PRONE CACHE LINE SLOTS OF MEMORY SIDE CACHE OF MULTI-LEVEL SYSTEM MEMORY

Filed 2016-03-31 · Granted · Patent 10185619 (2019-01-22) The official file ↗The patent and its PDF ↗ · Art unit 2114 · Examiner Chae M Ko Easy · CPC G06F 12/0804 · INTEL CORPORATION · Compass IP Law PC

Office actions

first was Non-final rejection

RCEs

no appeal

To first action

17.1 mo

to disposition 33.7 mo

Statutes raised

103

2 actions read

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