Patent AnalyticsExaminers
Menu

Application

15484056 · MANUFACTURING PROCESS OF WAFER LEVEL CHIP PACKAGE STRUCTURE HAVING BLOCK STRUCTURE

Filed 2017-04-10 · Granted · Patent 9953960 (2018-04-24) The official file ↗The patent and its PDF ↗ · Art unit 2826 · Examiner Alexander O Williams Typical · CPC H10W 90/00 · ChipMOS Technologies Inc. · JCIPRNET

Office actions
1
first was Non-final rejection
RCEs
0
no appeal
To first action
5.6 mo
to disposition 12.5 mo
Statutes raised
103
1 actions read
Unlock the prosecution timelineIncluded in Pro, from $29 a month. Cancel any time.

See plans Sign in