Application

16407266 · METHOD OF TREATING SILICON WAFERS TO HAVE INTRINSIC GETTERING AND GATE OXIDE INTEGRITY YIELD

Filed 2019-05-09 · Granted · Patent 10707093 (2020-07-07) The official file ↗The patent and its PDF ↗ · Art unit 2894 · Examiner Tony Tran Hard · CPC H10P 95/90 · SunEdison Semiconductor Limited (UEN201334164H) · Richard A. Schuth (SunEdison)

Office actions

first was Non-final rejection

RCEs

no appeal

To first action

2.8 mo

to disposition 14.0 mo

Statutes raised

102 103

2 actions read

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