Application

17346559 · Wafer Level Chip Scale Packaging Intermediate Structure Apparatus and Method

Filed 2021-06-14 · Granted · Patent 11631611 (2023-04-18) The official file ↗The patent and its PDF ↗ · Art unit 2891 · Examiner David A Zarneke Typical · CPC H10W 20/01 · Taiwan Semiconductor Manufacturing Co., Ltd. · INTELLECTUAL PROPERTY DIVISION

Office actions

first was Notice of allowance

RCEs

no appeal

To first action

17.9 mo

to disposition 22.1 mo

Statutes raised

0 actions read

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