Application

17445328 · SEMICONDUCTOR FABRICATION METHOD AND STRUCTURE USING MULTIPLE SACRIFICIAL LAYERS TO FORM SIDEWALL SPACERS

Filed 2021-08-18 · Granted · Patent 11742245 (2023-08-29) The official file ↗The patent and its PDF ↗ · Art unit 2892 · Examiner Matthew E Gordon Typical · CPC H10D 84/0158 · Semiconductor Manufacturing International (Beijing) Corporation · Anova Law Group c/o SMIC

Office actions

first was Non-final rejection

RCEs

no appeal

To first action

16.2 mo

to disposition 24.3 mo

Statutes raised

103 112

1 actions read

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