Application

17510315 · METHODS FOR ENGINEERING INTEGRATED CIRCUIT DESIGN AND DEVELOPMENT

Filed 2021-10-25 · Granted · Patent 11748541 (2023-09-05) The official file ↗The patent and its PDF ↗ · Art unit 2851 · Examiner Phallaka Kik Easy · CPC G06F 30/398 · efabless corporation · PENILLA IP, APC - PATENT LAW

Office actions

first was Notice of allowance

RCEs

no appeal

To first action

17.9 mo

to disposition 22.3 mo

Statutes raised

0 actions read

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