Application

18469101 · SYSTEMS AND METHODS FOR COMPUTING ACCURATE LOAD IMPEDANCE IN THE PRESENCE OF MEASUREMENT ACCURACY-REDUCING EVENTS

Filed 2023-09-18 · Granted · Patent 12608061 (2026-04-21) The official file ↗The patent and its PDF ↗ · Art unit 2115 · Examiner Chun Cao Typical · CPC H04N 23/687 · Cirrus Logic International Semiconductor Ltd. · Cirrus Logic c/o Jackson Walker LLP

Office actions

first was Notice of allowance

RCEs

no appeal

To first action

29.3 mo

to disposition 31.1 mo

Statutes raised

0 actions read

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