Application

19059174 · METHODS OF FORMING TRANSISTOR INTERCONNECTS ON TOP OF A SEMICONDUCTOR DEVICE SUBSTRATE

Filed 2025-02-20 · Abandoned The official file ↗ · Art unit 1712 · Examiner Jr, Joseph Albert Miller Typical · CPC H10W 20/031 · Destination 2D Inc. · WOMBLE BOND DICKINSON (US) LLP

Office actions

first was Non-final rejection

RCEs

no appeal

To first action

1.8 mo

to disposition 11.9 mo

Statutes raised

0 actions read

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